Digital Logic Design(DLD) or Digital Electronics(DE)
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What you'll learn
This course includes
- 24.5 hours of video
- Certificate of completion
- Access on mobile and TV
Course content
1 modules • 153 lessons • 24.5 hours of video
Digital Logic Design(DLD) or Digital Electronics(DE)
153 lessons
• 24.5 hours
Digital Logic Design(DLD) or Digital Electronics(DE)
153 lessons
• 24.5 hours
- Convert Decimal to any other Base(Binary, Octal, Hexadecimal)| Conversion from One radix to another 13:09
- Convert Binary to any other Base(Decimal, Octal, Hexadecimal)| Conversion from One radix to another 15:35
- Convert Octal to any other Base(Binary,Decimal,Hexadecimal) || Conversion from One radix to another 12:08
- Convert Hexadecimal to any other Base(Binary, Octal, Decimal)|Conversion from One radix to another 11:30
- Decimal to Binary Conversion || Digital logic design || DLD | Conversion from One radix to another 09:45
- Binary to Decimal Conversion || Digital logic design || DLD | Conversion from One radix to another 05:46
- Binary to Octal Conversion | Octal to Binary Conversion | DLD | Conversion from One radix to another 06:48
- Binary to Hexadecimal Conversion || Hexadecimal to Binary Conversion || Digital logic Design || DLD 06:57
- Decimal to Octal Conversion || Digital logic design || DLD || Conversion from One radix to another 06:22
- Octal to Decimal Conversion || Digital logic design || DLD | Conversion from One radix to another 05:02
- Decimal to Hexadecimal Conversion || Hexadecimal to Decimal Conversion || Digital logic design | DLD 11:01
- Octal to Hexadecimal Conversion || Hexadecimal to Octal Conversion || Digital logic design | DLD 07:13
- Logic Gates - AND,OR,NOT,NAND,NOR, XOR,XNOR | Truth Table | Digital logic design|Digital Electronics 15:55
- Implementation ( Realization ) of all logic gates using NAND gate and NOR gates | DLD | STLD | DE 19:17
- Signed and Unsigned binary number representation | Sign magnitude | One's complement | Two's |DLD|CO 18:02
- Binary Addition || Binary Arithmetic || Digital logic design | Digital Electronics | DLD | STLD | DE 03:18
- Binary Subtraction | 1's | 2's | Complement | Digital logic design | Digital Electronics | STLD | CO 09:33
- Binary Subtraction || with borrow ||Digital logic design || Digital Electronics || STLD || CO || DLD 12:34
- r's and (r-1)'s complement | 1's | 2's | 9's | 10's | 7's | 8's | 15's | 16's | DLD | CO | STLD |DE 11:28
- BCD code | BCD Addition | BCD Arithmetic | Digital logic design | Digital Electronics |DLD| STLD |CO 15:59
- Gray code || Convert Binary to Gray code and vice-versa || Digital logic design | DLD | STLD | CO 08:23
- Excess 3 Code | BCD to Excess 3 code & Vice-versa | Digital logic design | Digital Electronics| STLD 09:07
- Excess 3 Addition || Digital Logic Design || Digital Electronics 10:27
- Self Complementing Code | Excess 3 | 2421 | Digital logic design | Digital Electronics | STLD|CO|DLD 08:53
- Reflective Code || Gray code || Digital logic design || Digital Electronics || DLD || STLD || CO 05:54
- Classification of Binary Codes || Digital logic design || DLD || STLD || Digital Electronics || DE 14:27
- Basic Laws of Boolean Algebra || Basic Rules of Boolean Algebra || Fundamentals of Boolean Algebra 10:46
- Dual of Boolean Expression || Digital Logic Design || Digital Electronics || DLD || DE 03:00
- Simplification of Boolean Expressions using Boolean Algebra rules Part 1 || DLD || STLD || CO || CA 15:40
- Simplification of Boolean Expressions using Boolean Algebra rules Part 2 || DLD || STLD || CO || CA 18:15
- Simplification of Boolean Expressions using Boolean Algebra rules || DLD || STLD || CO || CA 33:55
- Minterms and Maxterms in Boolean Algebra || SOP || POS | Digital Logic Design | Digital Electronics 08:32
- SOP || POS || Canonical sop || Canonical pos || Sum of products || Product of sum || DLD || DE 09:57
- Convert SOP to Canonical SOP or Standard SOP | Express the Boolean Function as a Sum of Minterms 05:41
- Convert SSOP to SPOS || Convert SPOS to SSOP || Standard sum of product || Standard product of sum 06:37
- Ex 1|Convert POS to Canonical POS|Standard POS|Express the Boolean Function as a Product of Maxterms 05:42
- Ex 2|Convert POS to Canonical POS|Standard POS|Express the Boolean Function as a Product of Maxterms 05:42
- Ex 3|Convert POS to Canonical POS|Standard POS|Express the Boolean Function as a Product of Maxterms 08:04
- Ex 4|Convert POS to Canonical POS|Standard POS|Express the Boolean Function as a Product of Maxterms 06:32
- Karnaugh Map || K - Map || Digital Logic Design || Digital Electronics 05:38
- Two Variable Karnaugh Map || 2-Variable K-Map || Simplification of Boolean Expressions || DLD | DE 08:04
- Three Variable Karnaugh Map | 3 -Variable K-Map | Simplification of Boolean Expressions | DLD | DE 17:39
- Four Variable Karnaugh Map Part 1 | 4 - Variable K-Map | Simplification of Boolean Expressions 15:25
- Four Variable Karnaugh Map Part 2 | 4 - Variable K-Map | Simplification of Boolean Expressions 11:03
- Four Variable Karnaugh Map Part 3 | 4 - Variable K-Map | Simplification of Boolean Expressions 09:47
- Four Variable Karnaugh Map Part 4 | 5 Examples | 4 - Variable K-Map | Simplification of Boolean Ex 07:22
- 2 Variable K-Map Simplification for POS form || Karnaugh Map Minimization Using Maxterms 08:51
- 3 Variable K-Map Simplification for POS form || Karnaugh Map Minimization Using Maxterms 07:03
- 4 Variable K-Map Simplification for POS form || Karnaugh Map Minimization Using Maxterms 07:05
- Karnaugh Map with Don't Cares || Don't Care Condition in K - Map Part 1 09:58
- Karnaugh Map with Don't Cares || Don't Care Condition in K - Map Part 2 07:11
- Don't Care Condition in POS Karnaugh Map || How to solve POS with don't care Conditions 08:59
- Implicants || Prime Implicants || Essential Prime Implicants || Karnaugh Map || K-Map || DLD || DE 08:06
- Prime Implicants and Essential Prime Implicants in Karnaugh Map || K-Map || DLD || DE 06:40
- 5 Variable K-Map with an example || Five Variable Karnaugh Map || DLD || DE 07:28
- 5 Variable K-Map with 2 Examples || Five Variable Karnaugh Map || DLD || DE 10:02
- Half Adder || Combinational Circuit || Digital Logic Design || Digital Electronics || DLD || DE 04:23
- Realization (Implementation) of Half Adder using NAND gate || Digital Logic Design 06:07
- Realization (Implementation) of Half Adder using NOR gate || Digital Logic Design 06:53
- Full Adder || Combinational Circuit || Digital Logic Design || Digital Electronics || DLD || DE 06:57
- Realization (Implementation) of Full Adder using NAND gate || Digital Logic Design 07:59
- Realization (Implementation) of Full Adder using NOR gate || Digital Logic Design 10:12
- Design of Full Adder using Half Adders || Digital Logic Design || DLD 05:35
- Parallel Adder || Ripple Carry Adder || Digital Logic Design || Digital Electronics || DLD || DE 08:17
- 4 Bit Binary Adder || Digital Logic Design || Digital Electronics 08:51
- 4 Bit Binary Subtractor || Digital Logic Design || Digital Electronics 08:39
- Half Subtractor || Combinational Circuit || Digital Logic Design || Digital Electronics || DLD || DE 04:01
- Realization (Implementation) of Half Subtractor using NAND gate || Digital Logic Design 07:00
- Realization (Implementation) of Half Subtractor using NOR gate || Digital Logic Design 05:04
- Full Subtractor || Combinational Circuit || Digital Logic Design || Digital Electronics || DLD || DE 10:58
- Realization (Implementation) of Full Subtractor using NAND gate || Digital Logic Design 12:35
- Realization (Implementation) of Full Subtractor using NOR gate || Digital Logic Design 12:21
- 1 Bit Comparator || Magnitude Comparator || Digital Logic Design || DLD || Digital Electronics | DE 05:56
- 2-Bit Comparator || 2 Bit Magnitude Comparator || Digital Logic Design || Digital Electronics 15:04
- 4-Bit Comparator || 4 Bit Magnitude Comparator || Digital Logic Design || Digital Electronics 10:56
- Introduction to Multiplexers || 2*1 Multiplexer || 4*1 Multiplexer || DLD || Digital Electronics 08:04
- 8×1 Multiplexer || Digital Logic Design || Digital Electronics || DLD || DE || STLD 08:06
- Implementation of 4 × 1 Multiplexer using 2 × 1 Multiplexer || Digital Logic Design || DE || DLD 07:08
- Implementation of 8 × 1 Multiplexer using 4 × 1 and 2 × 1 Multiplexer || Digital Logic Design 08:08
- Introduction to DeMultiplexers || 1×2 DeMultiplexer | 1×4 DeMultiplexer | DLD | Digital Electronics 08:04
- Introduction to Decoders || 2 × 4 Decoder || Digital Logic Design || Digital Electronics | DLD | DE 06:34
- 3 × 8 Decoder || Digital Logic Design || Digital Electronics 06:31
- Construction of 3 * 8 Decoder using Two 2 * 4 Decoders | Digital Logic Design |Digital Electronics 04:34
- 4 * 16 Decoder || Digital Logic Design || Digital Electronics 09:23
- Construction of 4 * 16 Decoder using Two 3 * 8 Decoders | Digital Logic Design |Digital Electronics 06:53
- Construction of 4 * 16 Decoder using 2 * 4 Decoders | Digital Logic Design |Digital Electronics 06:21
- Implementation of Full Adder using Decoders || Digital Logic Design || Digital Electronics 06:04
- Introduction to Encoders || 4 * 2 Encoder || Digital Logic Design || Digital Electronics 05:04
- 8 * 3 Encoder || Octal to Binary Encoder || Block Diagram || Truth Table || Logic Circuit | DLD | DE 08:00
- 10 * 4 Encoder || Decimal to BCD Encoder || Block Diagram || Truth Table || Logic Circuit | DLD | DE 05:28
- Hexadecimal to Binary Encoder | 16 * 4 Encoder | Block Diagram | Truth Table | Logic Circuit | DLD 04:10
- 4 Bit Binary to Gray Code Converter || DLD || DE 13:47
- 4 Bit Gray Code to Binary Code Converter || DLD || Digital Electronics || Digital Logic Design 12:36
- 4 Bit BCD to Excess 3 Code Converter || Digital Logic Design || Digital Electronics || DLD || DE 15:33
- 4 Bit Excess 3 to BCD Code Converter || Digital Logic Design || Digital Electronics || DLD || DE 17:40
- 4 Bit BCD to Gray Code Converter || Digital Logic Design || Digital Electronics || DLD || DE 15:00
- 4 Bit Gray Code to BCD Converter || Digital Logic Design || Digital Electronics || DLD || DE 14:24
- 4 Bit Binary to BCD Code Converter || Digital Logic Design || Digital Electronics || DLD || DE 11:08
- 4 Bit Binary Adder Subtractor || Digital Logic Design || Design Electronics 09:55
- Excess 3 Adder || Excess 3 Addition || Digital Logic Design || Digital Electronics 06:51
- Carry Look Ahead Adder || CLA adder || Digital Logic Design || Digital Electronics 18:01
- Quine McCluskey Minimization Technique || Example 1 | Tabulation Method | DLD | Digital Electronics 33:04
- Quine McCluskey Minimization Technique || Example 2 | Tabulation Method | DLD | Digital Electronics 16:47
- Quine McCluskey Minimization Technique || Example 3 | Tabulation Method | DLD | Digital Electronics 21:08
- SR latch using NAND gate || Flip Flops || Digital Logic Design(DLD) || Digital Electronics (DE) 10:00
- SR latch using NOR gate || Flip Flops || Digital Logic Design(DLD) || Digital Electronics (DE) 08:50
- SR Flip Flop using NAND gate || Flip Flops || Digital Logic Design(DLD) || Digital Electronics (DE) 10:44
- SR Flip Flop using NOR gate || Flip Flops || Digital Logic Design(DLD) || Digital Electronics (DE) 10:56
- SR Flip Flop Characteristic Table, Excitation Table & Characteristic Equation 09:37
- D Flip Flop || Circuit Diagram || Truth Table || Characteristic || Excitation || Table || Equation 05:44
- T Flip Flop || Circuit Diagram || Truth Table || Characteristic || Excitation || Table || Equation 05:48
- Introduction to JK Flip Flop || Circuit Diagram || Truth Table || Digital Electronics || DLD 06:49
- JK Flip Flop Characteristic Table, Excitation Table & Characteristic Equation | Digital Electronics 08:28
- Types of Triggering | Edge Triggering | Level Triggering | Digital Electronics |Sequential circuits 05:02
- Race Around Condition in JK Flip Flop || Digital Electronics || DLD || Sequential Circuits 03:27
- Registers in Digital Electronics || Digital Logic Design || DLD || DE 04:21
- Shift Registers || Types of Shift Registers || SISO || SIPO || PISO || PIPO || Digital Electronics 06:36
- SISO Shift Register || Serial In Serial Out Shift Register 12:10
- SIPO Shift Register || Serial In Parallel Out Shift Register 11:03
- PIPO Shift Register || Parallel In Parallel Out Shift Register 04:55
- PISO Shift Register || Parallel In Serial Out Shift Register 15:39
- Bidirectional Shift Register || Digital Electronics || Digital Logic Design 16:00
- Universal Shift Register || Bidirectional Shift Register with Parallel Load || Digital Logic Design 19:09
- Introduction to Counters in Digital Electronics || Digital Logic Design 05:13
- Synchronous vs Asynchronous Counters || Differences || What is ||Digital Logic Design || Electronics 07:19
- 3 Bit Asynchronous (Ripple) Up Counter || Mod 8 ||Digital Electronics || Digital Logic Design 18:24
- 2 Bit Asynchronous (Ripple) Up Counter || Mod 4 ||Digital Electronics || Digital Logic Design || DLD 12:43
- 4 Bit Asynchronous (Ripple) Up Counter || Mod 16 || Digital Electronics || Digital Logic Design 12:10
- Ring Counter in Digital Electronics || Digital Logic Design 06:08
- SR Flip Flop to JK Flip Flop Conversion || Digital Logic Design || DLD || Digital Electronics || DE 08:32
- JK to SR Flip Flop Conversion || Digital Logic Design || Digital Electronics || DLD || DE 09:08
- SR Flip Flop to D Flip Flop Conversion || Digital Logic Design || DLD || Digital Electronics || DE 06:16
- D Flip Flop to SR Flip Flop Conversion || || Digital Logic Design || DLD | Digital Electronics | DE 08:12
- SR Flip Flop to T Flip Flop Conversion || SR to T Flip Flop Conversion || DLD || DE || Digital Logic 07:17
- T Flip Flop to SR Flip Flop Conversion || Converting T to SR Flip Flop || DLD || DE || Digital Logic 07:27
- T Flip Flop to D Flip Flop Conversion || T to D Flip Flop Conversion || DLD || DE || Digital Logic 04:36
- D Flip Flop to T Flip Flop Conversion || D to T Flip Flop Conversion || DLD || DE || Digital Logic 04:44
- JK Flip Flop to D Flip Flop Conversion || JK to D Flip Flop Conversion || DLD || DE || Digital Logic 05:24
- D Flip Flop to JK Flip Flop Conversion || D to JK Flip Flop Conversion | DLD | flip Flop Conversion 06:36
- JK Flip Flop to T Flip Flop Conversion || JK to T Flip Flop Conversion || Flip Flop Conversions 05:28
- T to JK Flip Flop Conversion || T Flip Flop to JK Flip Flop Conversion || DLD | Digital logic design 06:38
- Programmable Logic Array (PLA) in Digital Electronics || DLD | Implement Boolean functions using PLA 08:49
- Programmable Array Logic(PAL) in Digital Electronics || DLD | Implement Boolean functions using PAL 09:02
- Implementation of Boolean Function using Multiplexers || 8:1 || 4:1 || implementing boolean function 07:13
- Implementation of Boolean Function using Multiplexers || 8:1 || 4:1 || Example 2 || Implementing 10:08
- PROM (Programmable Read Only Memory) || Implementing Boolean Functions using PROM || PROM Example 08:06
- PROM (Programmable Read Only Memory) || Implementing Full Adder using PROM || PROM Example2 05:21
- Programmable Logic Devices | PLDs | PROM | PAL | PLA | Programmable Read Only Memory | Array Logic 15:17
- 1 to 8 Demultiplexer | 1 * 8 Demultiplexer | Working | Block Diagram |Truth Table|Boolean expression 05:20
- BCD Subtraction using 9’s Complement | 2 Examples | Digital Logic Design | DLD | Digital Electronics 12:40
- BCD Subtraction using 10’s Complement | 2 Examples | Digital Logic Design | DLD |Digital Electronics 10:53
- Excess 3 Subtraction using 9’s Complement || 2 Examples || Digital Logic Design || DLD || DE 13:48
- Johnson Counter in Digital Logic Design || Twisted Ring Counter || Switch tail || DLD | Electronics 07:45
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