Computer Organization and Architecture (Complete Playlist)
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What you'll learn
This course includes
- 9.5 hours of video
- Certificate of completion
- Access on mobile and TV
Course content
1 modules • 66 lessons • 9.5 hours of video
Computer Organization and Architecture (Complete Playlist)
66 lessons
• 9.5 hours
Computer Organization and Architecture (Complete Playlist)
66 lessons
• 9.5 hours
- L-1.1: Computer Organization and Architecture Syllabus Discussion for GATE and UGC NTA NET 13:40
- L-1.2: Von Neumann's Architecture | Stored Memory Concept in Computer Architecture 09:40
- L-1.3:Various General Purpose Registers in Computer Organization and Architecture 15:11
- L-1.4:Types of Buses (Address, Data and Control) in Computer Organization and Architecture 07:59
- L-1.5: Common bus system using multiplexer | Computer organization and Architecture 11:26
- L-1.6: Common Bus system| How basic computer works 19:11
- L-1.7: Types of Instructions in General Purpose Computer | Computer Organization and Architecture 05:11
- L-1.8: Data Transfer Instructions in Computer Organisation and Architecture 07:45
- L-1.9: Arithmetic Instructions(Data Manipulation) in Computer Organisation and Architecture 08:44
- L-1.10: Logical Instructions(Data Manipulation) in Computer Organisation and Architecture 09:12
- L-1.11: Shift Instructions(Data Manipulation) in Computer Organisation and Architecture 13:28
- L-1.12: Program Control Instructions(Types of Control Instructions) | Computer Organization 10:51
- L-1.13: What is Instruction Format | Understand Computer Organisation with Simple Story 10:40
- L-1.14: Question on Instruction Format | Computer Organization | UGC NTA NET June 2021 08:51
- L-1.15: Single Accumulator CPU Organisation | Single Address Instructions in Computer Organisation 08:03
- L-1.16: General Register CPU Organisation | Two and Three Address Instructions | COA 07:19
- L-1.17: Register Stack Organisation | Zero Address Instructions | COA 11:50
- L-1.18:Memory Stack Organisation | Memory stack Vs Register stack | COA 06:03
- L-2.1: What is Addressing Mode | Various Types of Addressing Modes | COA 11:45
- L-2.2: Implied Addressing Mode | Computer Organisation and Architecture 04:56
- L-2.3: Immediate Addressing Mode | Computer Organisation and Architecture 06:36
- L-2.4: Register Mode | Addressing Mode | Computer Organisation and Architecture 04:39
- L-2.5: Register Indirect Mode | Addressing Modes | Computer Organisation and Architecture 06:22
- L-2.6: Auto Increment and Decrement Addressing Modes | Computer Organisation and Architecture 06:51
- L-2.7: Direct Addressing Mode || Computer Organization and Architecture 04:51
- L-2.8: Indirect Addressing Mode | Computer Organisation and Architecture 06:05
- `L-2.9: Relative Addressing Mode || Computer Organisation and Architecture 07:08
- L-2.10: Base Register Addressing Mode || Computer Organisation and Architecture 06:58
- L-2.11: Indexed Addressing Mode || Computer Organisation and Architecture 04:05
- L-2.12: Question on Addressing Modes | Computer Organization 04:46
- L-2.13: RISC vs CISC | Computer Organization & Architecture 08:22
- L-3.1: Memory Hierarchy in Computer Architecture | Access time, Speed, Size, Cost | All Imp Points 07:32
- L-3.2: Independent vs Hierarchical Memory Organization | 2-Level Memory Organization 10:04
- L-3.3: 3-Level Memory Organisation || Computer Organisation and Architecture 08:19
- L-3.4: GATE 2004 Question on 3-Level Memory Organisation || Computer Organisation and Architecture 05:50
- L-3.5: What is Cache Mapping || Cache Mapping techniques || Computer Organisation and Architecture 07:40
- L-3.6: Direct Mapping with Example in Hindi | Cache Mapping | Computer Organisation and Architecture 22:03
- L-3.7: GATE 2005 Question on Direct Mapping | Cache Mapping Questions | Computer Organization 07:22
- L-3.8: Fully Associative Mapping with examples in Hindi | Cache Mapping | Computer Organisation 09:56
- L-3.9: Advantages and Disadvantages of Direct Mapping | Cache Mapping | Computer Organisation 09:08
- L-3.10: Set Associative Mapping with Examples in Hindi | Cache Mapping | Computer Organisation 10:52
- L-3.11: Locality of Reference in Cache Memory | Spatial Vs Temporal Locality | Computer Organization 08:47
- L-3.12: Cache Replacement Algorithms in Computer Organisation and Architecture 05:35
- L-3.13: LRU (Least Recently Used) Cache Replacement Algorithm | Computer Organisation & Architecture 08:58
- L-3.14: Gate 2014 Question on Set Associative Cache Mapping | Computer Organisation and Architecture 08:16
- L-3.15: FIFO Cache Replacement Policy with example | Computer Organisation and Architecture 09:05
- L-3.16: LRU(least recently used ) Cache Replacement Policy | Computer Organisation and Architecture 07:31
- L-4.1: Pipelining with real life example| Need of Pipelining | COA 08:18
- L-4.2: Pipelining Introduction and structure | Computer Organisation 03:54
- L-4.3: Pipelining Vs Non-Pipelining | Instruction Execution | Speedup, Efficiency, Utilization | COA 13:04
- L-4.4: Stage Delay in Pipeline | Previous Year GATE Question | Computer Organisation & Architecture 10:54
- L-4.5: Numerical Question on Pipelining | Previous year GATE Question | COA 04:25
- L-4.6: What is Hazard in Pipelining | various types of Hazards | computer Architecture 10:29
- L-4.7: Structural Hazards in Pipelining | Types of Hazards with Example in Hindi 09:33
- L-4.8: Control Hazards in Pipelining | Types of Hazards with Example in Hindi 13:52
- L-4.9: What is Read After Write(RAW) Hazards| Data Hazard in Pipelining with Example in Hindi | COA 08:05
- L-4.10: Write After Read Hazard with Example | Data Hazards| Computer Organization and Architecture 09:19
- L-4.11: Write After Write Hazard | Data Hazards in Pipelining | Computer Organization &&Architecture 05:51
- L-4.12: Register Renaming in Computer Organization | Data Hazard 09:56
- L-4.13: Operand Forwarding in Computer Organization & Architecture | Data Hazard 11:11
- I/O Interface in Computer Organization 05:45
- Interrupts in 8085 microprocessor | Types of Interrupts in Computer Organization 09:37
- Daisy Chaining in Priority Interrupt | Priority Based Interrupt in I/O Organization 06:35
- Parallel priority interrupt | I/O organization 07:38
- Question on Interrupt Handling(I/O organization) | Computer Organization | UGC NTA NET June 2021 08:49
- Question on DMA (Direct Memory Access) | Input/Output Organization| COA | UGC NTA NET June 2021 07:01
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